发明名称
摘要 PURPOSE:To eliminate the necessity of the use of an additional device for each circuit and to reduce the hardware quantity by providing an error log area to a main memory to store the state information and at the same time setting an artificial fault to perform a test for confirmation of the fault processing. CONSTITUTION:When a test is given to confirmation of the processing actuation with an artificial fault, an interruption is given at first to a service processor part 400 from a diagnosis control part 4. Then a processor 401 confirms the designation of a time point when the artificial fault is produced. The state information is frozen for each part of a processing part 100 at the designated time point. This state information is stored to an error log area 201 of a main memory 200, and the state information on the area designated later is set as the state information of a fault mode. Thus a test for confirmation is performed for the fault processing by said information. Thus the circuit 201 is added to store the state information. This eliminate the use of an additional circuit for each circuit for addition of an artificial fault and can reduce the hardware quantity.
申请公布号 JPS6315622(B2) 申请公布日期 1988.04.05
申请号 JP19830101172 申请日期 1983.06.07
申请人 NIPPON ELECTRIC CO 发明人 NAKAMURA TERUO
分类号 G06F11/22;G06F11/07 主分类号 G06F11/22
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