发明名称 ERROR DETECTING CIRCUIT
摘要 PURPOSE:To easily point out the area of a trouble based on error occurring order by producing the information on the error occurring order that specifies the input order of error signals. CONSTITUTION:An error flip-flop (EFF)1-1 is set with production of an error signal 11-1. At the same time, a counter 2 is counted up and the output signal 16 of the counter 2 is set at 1. Thus (0) is held by a register 3-1 since only the EFF1-1 is set; while (1) is held by registers 3-2-3-n respectively. If an error signal 11-2 is produced, an EFF1-2 is set and the counter 2 is counted up. Thus the signal 16 is set at 2. Then (0), (1) and value (2) of the counter 2 are set to the register 3-1, the register 3-2 and registers 3-3-3-n respectively since only the EFF1-1 and 1-2 are set. Then the error occurring order is known.
申请公布号 JPS6373435(A) 申请公布日期 1988.04.04
申请号 JP19860218877 申请日期 1986.09.17
申请人 NEC CORP 发明人 ISHIKAWA TOSHIO
分类号 G06F11/34;G06F11/00 主分类号 G06F11/34
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