发明名称 DIGITAL ARITHMETIC CIRCUIT
摘要 PURPOSE:To obtain a characteristic applying a desired clip processing by using an N-bit input value as an output value when the carry of the most significant bit of an adder is logical '1' by an output switch circuit and using a contant '0' of N-bit natural binary notation as the output value when logical '0'. CONSTITUTION:With an input value 10 given to an input terminal 1, the adder 4 adds the input value 10 and a constant output value 30 and the result of sum is given as a carry output 49. When the input value 10 is less than a prescribed value 'k', the carry output 49 is logical '0' and when the input value 10 is 'k', or over, the carry output 49 is logical '1'. That is, when the carry output 49 is logical '0', the output value 60 is used as the constant '0' of natural binary notation and when the carry output 49 is logical '1', the input value 10 is used as the output value 60 so as to obtain a desired input/output characteristic as shown in solid lines 1 in figure.
申请公布号 JPS6374311(A) 申请公布日期 1988.04.04
申请号 JP19860220122 申请日期 1986.09.18
申请人 MATSUSHITA ELECTRIC IND CO LTD 发明人 OMOTANI YOSHIRO;SAGAWA KENTA;OZEKI HIROAKI;ISHIZU ATSUSHI;TANAKA MASANOBU
分类号 H03G11/00 主分类号 H03G11/00
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