| 摘要 |
PURPOSE:To control the thickness of a gate oxide film independently by depositing an insulating film, a conductive film and an oxidation-resistant film onto a semiconductor base body in succession, selectively leaving the laminated films only at a predetermined position and forming floating gate structure. CONSTITUTION:An oxide film 11 is shaped onto a P-type silicon semiconductor substrate 10, and a polycrystalline silicon film 12 is deposited onto the oxide film 11 through CVD. Laminated films 13 consisting of an oxide film, a nitride film and an oxide film are deposited onto the film 12. The oxide film 11, the silicon film 12 and the laminated films 13 are patterned and left only in a memory cell region. An oxide film 14 is shaped through a thermal oxidation method, a polycrystalline silicon film 15 is deposited on the whole surface through CVD, the gate structure of a peripheral element composed of the laminated structure of the oxide film 14 and the silicon film 15 and the floating gate structure of a memory cell are formed, and an N-type impurity is ion-implanted, using these gate structure as masks to shape regions 16. An oxide film 17 is formed while the regions 16 are activated, and the memory cell and N-type source-drain diffusion regions 18 are shaped. Accordingly, the thickness of the gate oxide films of the memory cell and the peripheral element can be controlled independently without deteriorating characteristics and reliability. |
