| 摘要 |
PURPOSE:To raise the integration density of an integrated circuit by a method wherein a polycrystalline silicon layer is used for the interconnection between gates and the interconnection coming into contact with a drain layer and this polycrystalline silicon layer is used for the electrical connection between drain layers of complementary transistor pairs. CONSTITUTION:A diode 41 is added, in the forward direction, to a polycry stalline silicon layer which connects one drain with the other. Regarding the interconnection of gates from inverters 51-53-52 to 54-56-55, a gate of a P-channel transistor 54 is wired by means of a P-type polycrystalline silicon layer coming into contact with a drain layer of a P-channel transistor 51, and a gate of an N-channel transistor 55 is wired by means of an N-type polycrystalline silicon layer which is connected with the drain layer of an N-channel transistor 52. By using the polycrystalline silicon layer for the electrical connection be tween drain layers of complementary transistor pairs in this manner, it is pos sible to raise the integration density. |
