| 摘要 |
PURPOSE:To increase calculation speed and to contrive to reduce the amount of hardware by providing an intermediate carry generating part, an intermediate result generating part, and a recorded multiplier generating part. CONSTITUTION:An intermediate carry generating part 1 determines an intermediate carry Cj 21 in accordance with the 2j-th digit and the (2j+1)th digit of a multiplier if the (2j-1)th digit of the multiplier is -1, and the part 1 determines it in accordance with the 2j-th digit and the (2j+1)th digit if the (2j-1)th digit of the multiplier is 0 or 1. An intermediate result generating part 2 determines an intermediate result Sj 22 in accordance with the (2j+1)th digit and the 2j-th digit if the (2j-1)th digit is -1, and the part 2 determines it in accordance with the (2j+1)th digit and the 2j-th digit of the multiplier if the (2j-1)th digit of the multiplier is 0 or 1. A recorded multiplier generating part 3 operates the arithmetic sum between the j-th intermediate result Sj and an intermediate carry Cj-1 from the just following (j-1)th result to generate the j-th digit of the recorded multiplier. Thus, the number of elements of an operation processing device is reduced and the calculation speed is increased. |
