| 摘要 |
PURPOSE:To reduce the error due to omission accompanied with justification by providing an additional bit in the least significant digit side of a justifying circuit to constitute the justifying circuit whose number of bits is larger than that of the fixed-point part of floating-point data by one. CONSTITUTION:A justifying circuit (right shifter) 4 has one additional bit 4a in the LSB side, and two floating-point data A1 and A2 to be operated are inputted to input data registers 1a and 1b to discriminate which data has a larger exponent part by a size discriminating circuit 2, and a selector 3 is switched in accordance with the discrimination result, and the fixed-point part of a subtrahend has bits inverted and the fixed-point part of data having a smaller exponent part is supplied to the justifying circuit 4. If an exponent part e1 of the minuend A1 is smaller than an exponent part e2 of the subtrahend A2, a fixed-point part a1 of the minuend A1 is supplied to the justifying circuit 4 and is right shifted. A fixed-point part e2 of the subtrahend A2 is supplied to a full adder 8, and '1' is added to the least significant bit on a basis of the signal from the circuit 2 to operate two's complement. |
