发明名称 PHASE LOCKED OSCILLATOR
摘要 PURPOSE:To keep a frequency constant by inverting a converter at the output side of a comparator in response to a polarity giving the output of a voltage controlled oscillator to a phase comparator so as to always keep synchronization, thereby preventing the self-running of a voltage controlled oscillator. CONSTITUTION:Multiplexers 1, 1' are interlocked, a pair A between a digital input data and a data subjected to the 1/4 frequency division 2 of the output frequency of the voltage controlled oscillator 7, and a pair B between the output of the voltage controlled oscillator 7 and a reference clock of a crystal oscillator are inputted to a phase comparator 3, where they are compared. In case of the pair A, the output of the oscillator 7 traces the digital input data and in case of the pair B, the output of the oscillator 7 follows the clock of the crystal oscillator. The output of the comparator 3 controls the voltage controlled oscillator 7 via the converter 4, a charging pump 5 and a loop filter 6. The converter 4 is inverted in response to the polarity of the reference voltage and tracing voltage to apply a synchronizing pulling-in. Thus, the synchronization is always kept to prevent the self-running of the voltage controlled oscillator, thereby keeping the frequency constant.
申请公布号 JPS6372237(A) 申请公布日期 1988.04.01
申请号 JP19860216576 申请日期 1986.09.12
申请人 MATSUSHITA ELECTRIC IND CO LTD 发明人 KAMIKADO TOSHIKAZU;IMURA MASAHARU;TANAKA SHINICHI
分类号 H03L7/08;H04L7/02;H04L7/033 主分类号 H03L7/08
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