发明名称 DIGITAL SIGNAL GAIN CONTROL
摘要 A volume control or amplitude varying system for digital signals includes a cascade connection of a coarse multiplier/divider (18') for changing the values of digital signals in 6 dB steps and a fine multiplier/divider (20') for changing the values of digital values logarithmically in substantially equal steps of less than 6 dB per step. The coarse multiplier/divider selectively multiplies the digital signal by powers of 2. The fine multiplier/divider is a scaling circuit which multiplies the digital signal by predetermined values, an ascending/decending sequence of which form a substantially logarithmic sequence. Both serial-bit and parallel-bit embodiments are described. Suitable for use in the fine multiplier/divider in a serial-bit embodiment, the invention also provides a bit-serial scaling apparatus including a cascade connection of signal combining circuits (60,62,66) in which a delay (58,64) of at least one bit period is provided by or between the combining circuits, and means (68-74) for selectively coupling an applied bit-serial signal to second input terminals of the combining circuits, their first input terminals being included in the cascade connection.
申请公布号 AU7880187(A) 申请公布日期 1988.03.31
申请号 AU19870078801 申请日期 1987.09.21
申请人 RCA CORP., 发明人 TODD J. CHRISTOPHER;CHARLES BENJAMIN DIETERICH
分类号 G06F7/53;G06F7/525;G06F7/533;G06F17/10;H03G3/00;H03G3/02;H03G7/00;H04R3/00 主分类号 G06F7/53
代理机构 代理人
主权项
地址