发明名称 METHOD OF TESTING CIRCUIT
摘要 A method for testing integrated circuits provided on a carrier. The circuits include a series input (22) and a series output (24) for test and result patterns. A mode control register (30) receives a mode control signal train via the serial input. Under the control of said mode control signal train the serial input and output can be shortcircuited to each other, or further registers (32, 34, 36) can be selectively filled and emptied. In this manner, both the interior of the integrated circuit and respective interconnection functions can easily be tested by a universal protocol. Integrated circuits and the carrier only require minor extension/adaptations.
申请公布号 JPS6370177(A) 申请公布日期 1988.03.30
申请号 JP19870225424 申请日期 1987.09.10
申请人 PHILIPS GLOEILAMPENFAB:NV 发明人 UIRUHERUMUSU ARUBAATO SAUERUWARUDO;FURANSHISUKASU HERARUDASU MARIA DE YONGU
分类号 G01R31/28;G01R31/3185;G06F11/22 主分类号 G01R31/28
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