| 摘要 |
PURPOSE:To reduce the area of a wiring and to improve an integration degree by a method wherein the wiring, which is of the same conductive layer as that of a power wiring to be extendedly provided on a fundamental cell, in the fundamental cell is effectively provided by fixing the potential of the gate electrodes of unused MISFETs by a wiring for fixing potential. CONSTITUTION:A wiring 8B for potential fixing is extendedly provided in the row direction on a field insulating film between MISFETs Qp and Qn in a fundamental cell 4. The wiring 8B for potential fixing is constitutted in such a way that supply voltage Vcc is applied to the wiring 8B. The wiring 8B for potential fixing is connected to the gate electrode terminals 8 of unused MISFETs Qn1 through wirings 11 E and the gate electrodes 8 are fixed in the supply voltage Vcc. In the case of this potential fixing, wiring forming regions L2 and L3, through which a wiring G can be passed, can be formed in the fundamental cell 4. As the potential of the gate electrodes 8 of the unused MISFETs is fixed in such a way, the need for providing an extruding wiring and so on is eliminated and the wiring in the fundamental cell 4 can be effectively provided. As a result, the area of the wiring is reduced and the integration degree can be improved. |
