| 摘要 |
PURPOSE:To restrict connection between a parallel/serial conversion circuit and a collecting part at its minimum required by multiplexing a data signal obtained from a conventional circuit, a clock signal and a strobe signal as one signal. CONSTITUTION:The data collecting circuit is constituted of a pulse generating circuit 101 for generating a transmission signal 110 to be a timing pulse and a data collecting signal, a detecting circuit 102 for detecting the leading bit of the signal 110, a counter circuit 103 to be initialized by an initializing signal 112 to be an output of the detecting circuit 102 by regarding the signal 110 as a clock, a pulse inhibit circuit 104 for regularly inhibiting the transmission signal 110 based on a control signal 113 to be an output of the circuit 103 and parallel data 114, and a comparator 105 for comparing a receiving signal 11 to be an output signal of the circuit 104 with the transmission signal 110 and sending serial data 115. Thus, the number of signal lines required for an interface between the parallel/serial conversion part 106 and the collecting part 107 is restricted at its minimum required by multiplexing a data signal, a clock signal and a strobe signal as one signal. |
