发明名称 INTERRUPTION CONTROL SYSTEM
摘要 PURPOSE:To perform the interruption processing jobs with many events by comparing the message level information held by a control means with a threshold level set previously when an interruption request is accepted and changing the set present interruption level. CONSTITUTION:When a CPU102 is ready to accept an interruption and at the same time the level of an interruption request given from a bus interface part BIU103 is higher than the present interruption level of the CPU102, the CPU102 interrupts its executing processing and increases the current level up to said interruption request level. If the message level is lower than the threshold level, the CPU102 writes the threshold level to a message level register in the part BIU103 and accepts only the messages having levels higher than the threshold level and received from a bus 101. Then the current level of the CPU102 is increased by a rank and the CPU102 carries out the interruption processing. Thus hereafter the CPU102 does not accept the interruption given from the BIU103 and the interruptions lower than the level of said interruption.
申请公布号 JPS6367639(A) 申请公布日期 1988.03.26
申请号 JP19860213180 申请日期 1986.09.09
申请人 NEC CORP 发明人 ODAN ETSURO
分类号 G06F9/48;G06F13/24 主分类号 G06F9/48
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