| 摘要 |
PURPOSE:To simplify investigation of the factor of a fault by providing an exclusive cache memory to each processor and inhibiting the rewriting of the cache memory when another processor rewrites a main memory in an investigation mode of the fault. CONSTITUTION:Each processor PC3 has its exclusive cache memory 2 and a monitor circuit 4 gives a rewrite permission signal to the memory 2 when another PC9 rewrites the data on a main memory 1 in the same address as the data copied in the memory 2. In a fault search mode, the PC9 sends the address of a flag register 13 to a bus 10 and at the same time sends a bit to a bus 11 to set the register 13. A decoder 12 decodes the address of the register 13 and sets the register 13 in an enable state. Then the register 13 sends 1 to a NOT circuit 14 and the circuit 14 sends 0 to an AND circuit 15. Therefore the circuit 15 inhibits the rewrite permission signal of the circuit 4. As a result, the situation is easily grasped in a fault search mode with no breakdown of the contents of the memory 2 even though the data on the memory 1 is rewritten by the PC9. |
