发明名称 MEMORY CONTROL SYSTEM
摘要 PURPOSE:To prolong the life of a device having many number of times of on and off of a power source by providing a control circuit for controlling a storage to a non-volatile memory according to information held in a memory circuit at the time of turning off the power source. CONSTITUTION:The outputs of flip flops 2, 5 are supplied to a NOR gate 4 to execute a NOR operation, form a power down pulse, it is supplied to a NAND gate 5 and a NAND operation with the output of the flip flop 1 is carried out. In such a case, the output of the NAND gate 5 is formed as a non-volatile memory storing signal, outputted to a memory circuit 6 and at the time of disconnecting the power source, the contents of a high speed volatile memory 7 are stored in an EEPROM8. At the time of turning on the power source, when the writing to the high speed volatile memory 7 is not executed, the flip flop 1 is not set, so that the output remains 0, and at the time of disconnecting the power source, even when the power down pulse signal is supplied to the NAND gate 5, a non-volatile memory storing signal is not formed and the rewriting of data to the EEPROM8 is suppressed. Thereby, the number of times of writing of the EEPROM is limited to a required minimum range and the service life of the device can be prolonged.
申请公布号 JPS6366797(A) 申请公布日期 1988.03.25
申请号 JP19860210780 申请日期 1986.09.09
申请人 OKI ELECTRIC IND CO LTD 发明人 KASEDA NAOHIKO
分类号 G06F12/16;G11C29/00;G11C29/04 主分类号 G06F12/16
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