| 摘要 |
<p>The decoder (DCD) has a decoder section (MDC) and display manager (MAF). The decoding section comprises a pipeline (PPL) which supplies blocks of luminance and chrominance to a summator which is also supplied with predictor blocks (FPR). The display manager (MAF) has a multiplexer (MUX), a block/line convertor (BRC) which includes an auxiliary memory and a video controller (VDCTL)</p> |
