发明名称 PROCESSING INTERRUPTION PREVENTING DEVICE FOR MICROCOMPUTER
摘要 <p>PURPOSE:To continue a processing without returning to a first procedure while the processing is interrupted even when a power source is instantaneously stopped by being provided with an interruption preventing circuit and a storage means to store the number of a present processing procedure. CONSTITUTION:When a power source 6 is turned on, a resetting signal (b) is inputted from a power on resetting circuit 4. Since a microcomputer 5' reads a signal level (e) of a port P0 of an MPU 1' and is an H level, the computer starts the processing of a processing procedure No.1, thereafter, performs the processing successively, and stores the number of the processing procedure at that time into a RAM 3 each time the procedure is shifted. When instantaneous stoppage is executed during the processing execution of a procedure No.i, the signal (b) comes to be once an L level, comes to be an H level immediately, and therefore, the level (e) is read again. At this time, for a capacitor C of an interruption preventing circuit 8, a terminal voltage (c) is a value a little lower than a maximum voltage due to the immediate end of starting the discharging, and therefore, the condition before the instantaneous stoppage is held for the level (e) of the port P0. Thus, the processing of No.i is intermittently executed.</p>
申请公布号 JPS6364114(A) 申请公布日期 1988.03.22
申请号 JP19860207836 申请日期 1986.09.05
申请人 HITACHI CONSTR MACH CO LTD 发明人 KIMURA TOSHIHIRO
分类号 G06F1/30;G06F1/00 主分类号 G06F1/30
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