| 摘要 |
PURPOSE:To take frame synchronization quickly by taking subframe synchronization depending on a subframe synchronizing pattern and a frame synchronizing pattern having a high rate of occurrence and taking the frame synchronization based on the subframe synchronization. CONSTITUTION:Detection circuits DATA12 and DATB14 of the 1st and 2nd pattern detection circuits 1, 2 send an output pulse in obtaining the same pattern as the subframe synchronizing pattern and the frame synchronizing pattern as to an a-bit of an inputted data one by one bit respectively. The pulse resets a calculation circuit 31 via gate circuits G1, G2 after being reset, the circuit 31 counts a pulse TSCLK and sends an output after a prescribed number of pulses is counted. In obtaining the next output from the circuit G2, it is stored in a latch circuit 32. Then only a detection output of the frame synchronizing pattern taken at each prescribed number of subframes is outputted from a gate circuit G7 in the 2nd confirmation circuit 4. |
