| 摘要 |
PURPOSE:To implement high density in a unit memory element, by using a conductor layer and a high-resistance polycrystalline silicon layer, thereby decreasing the occupying area of the base region of the unit memory element. CONSTITUTION:After a P<+> type base region 6 is formed, a silicon oxide film 7 is formed on the surface. The film 7 is selectively etched, and a hole part is formed. A conductor layer 8 comprising titanium, alloy of titanium and tungsten and the like is formed so as to cover the hole part. A high-resistance polycrystalline silicon layer 9 is formed so as to cover the entire surface of the conductor layer 8 and the silicon oxide film 7. A metal electrode 10 for interconnection is formed thereon. Thereafter, a current is conducted through the high-resistance polycrystalline silicon layer 9, and the P-N junction between the P<+> type base region 6 and the an N-type semiconductor layer 4 is broken. Then information is written. Since an N<+> emitter region is not required in the P<+> type base region, the width of the P<+> type region 6 can be made narrow. Thus the occupying area per unit memory element can be reduced. |
