| 摘要 |
PURPOSE:To considerably shorten the clock transition period to contrive to improve the transfer speed of serial data by connecting a transmission equipment and a reception equipment to each other with one clock line and one data line and driving the clock line with a push pull buffer circuit and driving the data line with an open drain circuit. CONSTITUTION:Respective serial clock input/output terminals 104 and 154 of a master device 100 and a slave device 150 are connected by one serial clock line 180. Serial data input/output terminals 105 and 155 are connected by one serial data line 181, and a resistance 182 is used to pull up the serial data line 181 to a prescribed supply voltage. The clock line 180 is driven by the push pull buffer and the data line 181 is driven by the open drain buffer to sharpen the rise and the fall of clocks. Thus, the data transfer speed is increased and plural chips are connected by two lines, namely, the clock line and the serial data line. |
