Process for manufacturing metal-semiconductor field-effect transistors

摘要

A single-level photoresist process is used to make metal-semiconductor field-effect transistors (MESFETs) having more uniform threshold voltages. An N- layer is formed in a semi-insulating semiconductor, followed by formation of a dummy gate using a single-level photoresist process. Using the dummy gate as a mask, ions are implanted to form an N+ region. The length of the dummy gate is then reduced by plasma etching. A dielectric is deposited over the N+ region, the N+/N- interface, and the exposed portion of the N- layer. The dummy gate is lifted off to define a self-aligned, submicron gate opening. The gate opening on the N- layer is reactive ion etched to obtain the desired threshold voltage, and covered with a Schottky gate metal deposit.