Data base access mechanism for rules utilized by a synthesis¹procedure for logic circuit design.,申请号IE19870002447-传众专利搜索

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发明名称	Data base access mechanism for rules utilized by a synthesis¹procedure for logic circuit design.
摘要
申请公布号	IE872447(L)	申请公布日期	1988.03.12
申请号	IE19870002447	申请日期	1987.09.11
申请人	GERLAND,	发明人
分类号	G06F12/00;G06F9/44;G06F17/30;G06F17/50;(IPC1-7):H03K19/00	主分类号	G06F12/00
代理机构		代理人
主权项
地址

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