发明名称 INTEGRATED CIRCUIT CHIP MOUNTING SYSTEM
摘要 <p>PURPOSE:To eliminate a stray capacitance which causes delay of a transmitted signal and distortion of a waveform by removing wirings which are connected to I/O terminals of a daughter board on which an integrated circuit chip is mounted. CONSTITUTION:Chip I/O terminals 3 which are arranged on the surface of an integrated circuit chip 1 are electrically connected to daughter board surface terminals 5 with solder balls 4 and, in order to eliminate the influence of the difference in heat expansion coefficient between the chip 1 and the daughter board 1, the space between them is filled with resin 6. The daughter board surface terminals 5 are electrically connected to daughter board back surface terminals 8 with through holes 7. Testing pads 10 are provided on the back surface of the daughter board 2 to test the operation conditions of the integrated circuit chip 1. After the test is finished, the testing pad forming region is separated and, further, daughter board back surface wirings 9 which remain at the daughter board back surface terminals 8 are removed and then the daughter board 2 is mounted on a mother board. With this constitution, delay of I/O signal and distortion of a waveform caused by the stray capacitance of the daughter board back surface wirings 9 can be eliminated.</p>
申请公布号 JPS6353937(A) 申请公布日期 1988.03.08
申请号 JP19860197134 申请日期 1986.08.25
申请人 HITACHI LTD 发明人 FUJITA YUJI;YAMADA MINORU;MASAKI AKIRA;NISHI MASAAKI;MORI TAKAO
分类号 H01L21/60;H01L23/12 主分类号 H01L21/60
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