发明名称 JOSEPHSON DATA PROCESSOR
摘要 <p>PURPOSE:To lengthen the action cycle time of a memory part to >=two times and to facilitate the action of a memory part by making the period of power source supplied to the memory part slower >=two times of the power source period of a logical part. CONSTITUTION:A data processing device is constituted of a logical part 7 composed of logical units 1-3 and a memory part 8 composed of memory 4-6, and a trapezoidal current having the positive negative polarities is supplied by power source circuits 11-16 at respective units. The power is supplied directly from a power source 17 to power source circuits 11-13 of the units 1-3, and to power source circuits 11-13 of units 4-5, the power to frequency-divide the output of the power source 17 with a frequency-dividing circuit 18 is supplied. Namely, the memory part is driven by the power source of the period different from the power source period of the logical part. The data are transferred in the mutual direction by a data bus 19 at the section of the logical part 7, and the transferring is executed in the mutual direction with an external device by an input output terminal 20. Thus, since the power source period of the logical part can be made highly speedy, a system performance can be improved.</p>
申请公布号 JPS6353620(A) 申请公布日期 1988.03.07
申请号 JP19860197608 申请日期 1986.08.22
申请人 NEC CORP 发明人 WADA YOSHIFUSA
分类号 G06F1/26;G06F1/00;G06F12/00;G06F12/08;G11C11/44;H01L39/22;H03K19/195 主分类号 G06F1/26
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