发明名称 |
Semiconductor memory device. |
摘要 |
<p>A semiconductor memory device enabling a two or more direction data access with a high speed, a simple circuit construction and an easy selection. A semiconductor memory device including: a plurality of word lines; a plurality of bit lines; a plurality of momory cells (l0) connected to the bit lines and the word lines; a first selection unit operatively connected to the word lines, for selecting one of the word lines in response to a first address signal; and a second selection unit, operatively connected to the bit lines, for receiving a plurality of bit data from the bit lines and selecting at least two bit data from the received plurality of bit data in response to a second address signal. A relationship between the at least two bit data and the second address signal is changed in response to an access direction signal which designates one of the access directions.</p> |
申请公布号 |
EP0257987(A1) |
申请公布日期 |
1988.03.02 |
申请号 |
EP19870307369 |
申请日期 |
1987.08.20 |
申请人 |
FUJITSU LIMITED |
发明人 |
KOBAYASHI, KAZUYA;MIYASAKA, KIYOSHI;OGAWA, JUNJI BERUMEZON ICHIGAO 102 |
分类号 |
G11C7/10;G11C8/12;(IPC1-7):G11C7/00;G11C11/34;A61B6/03 |
主分类号 |
G11C7/10 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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