发明名称 Power buffer circuit
摘要 A power buffer circuit includes a power MOS device connected via a local feedback loop to a differential amplifier. The MOS device amplifies the power of an input signal to produce an output signal. The differential amplifier causes the output signal voltage to follow the input signal voltage by sensing a difference between the two voltages and generating in response a difference signal to the MOS device to change the output signal voltage level. The buffer circuit may be configured as a current source or a current sink that maintains unity voltage gain from the input to output signal. The power buffer circuit may be incorporated into a voltage regulator that maintains a remotely sensed output voltage substantially equal to a predetermined factor of a reference voltage via a second, outer feedback loop.
申请公布号 US4728901(A) 申请公布日期 1988.03.01
申请号 US19860848520 申请日期 1986.04.07
申请人 TEKTRONIX, INC. 发明人 PEPPER, STEVEN H.
分类号 G05F1/56;H03F1/34;H03F3/34;H03F3/345;H03F3/50;(IPC1-7):H03F1/34;G05F1/40 主分类号 G05F1/56
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