发明名称 DETECTION SYSTEM FOR PHASE-UNLOCKED STATE OF PHASE-LOCKED LOOP
摘要 PURPOSE:To remove unstableness from phase-unlocked state detecting operation by generating pulse signals from an original signal and a feedback signal respectively, and detecting the crossing of those two pulse signals. CONSTITUTION:An input signal [original signal (a)] and the feedback signal (b) to the phase comparing circuit 1 of a phase-locked loop are inputted to a pulse generating circuit 6 respectively. The circuit 6 generates pulse signals (f) and (g) from the original signal (a) and feedback signal (b). The signals (f) and (g) are controlled in relative phase relation while the phase-locked loop is in a phase- locked state, so a pulse crossing detecting circuit 7 detects no crossing of the signals (f) and (g). When the phase-locked loop enters the phase-unlocked state, the relative phase relation between the signals (f) and (g) is not maintained any more and varies continuously in either direction, and the circuit 7 detects the crossing of the signals (f) and (g) synchronously to send a pulse crossing detection signal (h) to an unlocked-state detection output circuit 8, which outputs a phase-unlocked state detection output signal (e).
申请公布号 JPS59200528(A) 申请公布日期 1984.11.13
申请号 JP19830073295 申请日期 1983.04.26
申请人 NIPPON DENKI KK 发明人 KIRIYAMA YOSHIO
分类号 H03L7/095 主分类号 H03L7/095
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