| 摘要 |
PURPOSE:To simultaneously realize a high speed and high grade integration by using a differential amplifier constituted of a flip flop of a CMOS type as a bit line sense amplifier and plural bipolar transistors and MOS transistors and connecting the input node of the differential amplifier and the bit line with a capacity coupling. CONSTITUTION:Since one MOS transistor Q1 and one capacitor C1 are used for one memory cell, the high integration two - four times of a static RA, in the same design rule. In a dynamic RAM difficult in the coupling to the BICMOS differential amplifiers Q9-Q20, the data of the bit line is transferred to the BICMOS differential amplifiers Q9-Q20 by the capacity coupling through capacitances C3, C4. Thus, the bit line and the differential amplifier can be separated in a direct current, so that the rewriting (restoring) of the memory cell can be easily carried out by the CMOS flip flops Q3-Q8. The data of the bit line transferred to the differential amplifier by the capacity coupling is amplified at higher speed by the differential amplifier. |
