发明名称 REFRESH CONTROL SYSTEM IN MEMORY DEVICE HAVING STACK REGISTER
摘要 PURPOSE:To cause no loss time and to increase a processing speed by writing refresh information in a stack register immediately when a refresh signal is received, and thereafter, reading out refresh access information from the stack register. CONSTITUTION:When a stack controller 3 is writing access information from a CPU in a stack register 1, if a refresh request signal 14 from a refresh timer address counter 5 is received, a refresh address 15 and a refresh command 20 are written in the stack register 1. Thereafter, the refresh address 15 and the refresh command 20 written in the stack register 1 are read out, and controlled so that a memory start signal is generated in a memory timing controller 4. In this way, the processing speed of a device is increased by omitting racing circuit delaying a signal and a multiplexer.
申请公布号 JPS59201291(A) 申请公布日期 1984.11.14
申请号 JP19830073787 申请日期 1983.04.28
申请人 TOSHIBA KK 发明人 INOUE AKIFUMI
分类号 G11C11/406;G11C11/34;(IPC1-7):G11C11/34 主分类号 G11C11/406
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