发明名称 MULTI-PROCESSOR SYSTEM
摘要 PURPOSE:To reduce the processor load and to increase the processing speed with a multi-processor system by providing the image of a shared memory on a main memory of a main processor after deleting said shared memory and at the same time locating dynamically said image at an optional area of the main memory by an indication received from the main processor. CONSTITUTION:A main processor 2 uses a shared memory access permission flag 8 to prevent an I/O processor 4 from giving an inadvertent access to a main memory (shared memory) 1. At the same time, a shared memory access holding circuit 9 limits an accessible range for the processor 4 of the memory 1. Thus the system reliability is improved and furthermore the memory 1 can be dynamically changed with internal/external changes of the circuit 9. Then it is possible to given an access of the desired data directly to the processor 4 with no shift of data as long as a desired data area is once set as the memory 1. As a result, the processor load is reduced and the processing speed is in creased with a multi-processor system.
申请公布号 JPS6345669(A) 申请公布日期 1988.02.26
申请号 JP19860188476 申请日期 1986.08.13
申请人 HITACHI LTD 发明人 TANAKA HIROYUKI
分类号 G06F15/16;G06F12/00;G06F12/06;G06F15/167;G06F15/177 主分类号 G06F15/16
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