| 摘要 |
PURPOSE:To decrease the number of elements by providing a transmit gate consisting of a (p) or (n) channel MOSFET and a latch circuit for level compensation. CONSTITUTION:A transmit gate which transmits one input signal A is formed on a (p) channel MOSFET Q5, and a transmit gate which transmits the other input signal B is formed of an (n) channel MOSFET Q6. A selection signal S is supplied to the gates of both FETs Q5 and Q6 in common to turn on the FETs Q5 and Q6 selectively and the input signal A or B is transmitted to a common connected node N. The signal of this node N is inputted to the latch circuit 5 consisting of an output CMOS inverter 6 and a feedback CMOS inverter 6 for level compensation. Thus, the number of elements is decreased. |
