发明名称 ALIGNMENT PROCESS FOR SEMICONDUCTOR CHIPS
摘要 <p>In a method of fabricating a linear array of semiconductor chips 18 such as LED's, solder is placed at selected locations on a substrate 10, semiconductor chips 18 are placed upon the solder and then the wider is melted, then cooled. As the solder melts, the semiconductor chips will align themselves due to surface tension and, upon solidifying of the solder, the chips will be secured to the substrate at the selected locations. A wetting agent may be placed at the selected locations, and a solder migration inhibitor at other locations. The selected locations may comprise depressions on the substrate. <IMAGE></p>
申请公布号 GB2156153(B) 申请公布日期 1988.02.24
申请号 GB19850007359 申请日期 1985.03.21
申请人 * PITNEY BOWES INC 发明人 SAMEUL A * HEIFETS;RICHARD A * CONNELL
分类号 H01L21/60;H01L25/075;H01L27/15;H01L33/00;(IPC1-7):H01L27/15;H01L25/04 主分类号 H01L21/60
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