| 摘要 |
PURPOSE:To execute a high speed timing synchronization and a high speed pulling-in by generating a complex signal in which one of an input signal and a delay signal, land the other are allowed to correspond to a real number part and an imaginary number part, respectively, and using a signal obtained by its complex square, as a phase comparing signal. CONSTITUTION:With respect to an input signal (a), a' is generated by a delaying circuit 11, and a complex signal (a + ja') is formed by the output a' and the input signal (a), and supplied to a complex arithmetic circuit 13. In the complex arithmetic circuit 13, a first phase comparing signal aa', and a second phase comparing signal a<2>-a'<2> are obtained as outputs. A detecting circuit 15 and a control circuit 17 prevent the error detection of a phase error generatd by the continuation of the same code, and extract only a correct phase error as the first phase comparing signal. Also, the first phase comparing signal and the second phase comparing signal are utilized for stationary slow phase control, and for a control for an initial high speed pulling-in. |
