发明名称 MOS TYPE SEMICONDUCTOR MEMORY
摘要 PURPOSE:To obtain a dynamic RAM in which a clear signal can be stored and read out even if a cell area is smaller by detecting the presence or absence of the charge of the cell by the substrate bias potential of a transistor formed in a floating well. CONSTITUTION:In order to write information in a cell, a transfer gate 3 is set to an ON state, and charge is charged in or discharged from a floating well 41 by a bit line 2. In order to read out the information, the threshold value variation of a reading transistor formed in the well 41 may be detected. Since the transistor under the gate 3 and the reading transistor have reverse channel polarities, if the well 41 is charged, a substrate bias is applied to the reading transistor, and the threshold value of the transistor is varied in response thereto. In this case, since the potential variation of the well 41 is read out by the reading transistor different from a conventional example in which the stored charge is led to the bit line, it is not necessary to increase the junction capacity of the well 41 and to obtain a large charge amount.
申请公布号 JPS6341066(A) 申请公布日期 1988.02.22
申请号 JP19860185718 申请日期 1986.08.06
申请人 MITSUBISHI ELECTRIC CORP 发明人 MIHASHI JUNICHI
分类号 H01L21/8242;H01L27/108;H01L29/78 主分类号 H01L21/8242
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