| 摘要 |
PURPOSE:To prevent malfunction by changing the propagation path of a clock signal depending on the presence of selective use of a redundancy bit so as to give a delay to the clock at the use of redundancy bit even if a memory is provided with the redundancy bit. CONSTITUTION:When it is not necessary to use a redundancy bit and a fuse 40 is not blown, the 4th stage clock generator 4 generates a clock with less delay same as the 2nd stage clock generator in response to an output of the 1st stage clock generator 1, a normal decoder 11 is controlled and a normal memory array 20 is accessed by being delayed for the normal speed. On the other hand, if the fuse 40 is blown to a defective bit, a redundancy memory 21 is accessed by the clock of the generator 2 via a spare decoder 30, the decoder 11 is controlled by the clock delayed by two stages outputted from the generator 4 via the clock generator 3 so as to prevent malfunction such as multi-selection of the decoders 30, 11. Thus, even if the redundancy bit memory is provided, the normal operation is attained normally without delay. |
