发明名称 MICROCOMPUTER WITH INTERPROCESS COMMUNICATION
摘要 A microcomputer comprises memory (13, 19) and CPU (12). Communication channels (50-53, 61, 63) are provided to permit data transmission from an outputting process (X) to an inputting process (Y) in response to input and output instructions. The channels are single word locations (50-53) in memory or registers (61, 63) in serial links (25) arranged to hold values which ensure that data transmission occurs when both processes are at corresponding stages in their program sequence. CPU 12 requires only one input or output instruction in a process program in order to effect data transmission.
申请公布号 DE3468759(D1) 申请公布日期 1988.02.18
申请号 DE19843468759 申请日期 1984.04.11
申请人 INMOS LIMITED 发明人 MAY, MICHAEL DAVID
分类号 G06F9/46;G06F9/48;G06F15/16;G06F15/177;(IPC1-7):G06F9/46 主分类号 G06F9/46
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