| 发明名称 |
DIFFERENTIAL CASCODE CURRENT SWITCHING TYPE MASTERSLICE |
| 摘要 |
A VLSI circuit cell (10) comprises a plurality of devices (T1-T11,R1-R9) wireable to form any one of a set of two level differential cascode current switch basic circuits. The devices are arranged so as to permit at least one pair of them to be wired to form an input translator circuit, and the devices have characteristics such as to provide a signal swing having a magnitude of approximately 200 millivolts (mv) or less. |
| 申请公布号 |
JPS6338242(A) |
申请公布日期 |
1988.02.18 |
| 申请号 |
JP19870159943 |
申请日期 |
1987.06.29 |
| 申请人 |
INTERNATL BUSINESS MACH CORP <IBM> |
发明人 |
EDOWAADO BII EIKERUBAAGAA;SUCHIIBUN EDOWAADO BERO;RORUFU OO BAAGEN;UIRIAMU MANNSHIYUU CHIYU;JIYON ARAN RADOUITSUGU;RICHIYAADO FURANKU RIZORO |
| 分类号 |
H03K19/086;H01L21/3205;H01L21/82;H01L23/52;H01L23/528;H01L27/118;H03K17/60;H03K17/62;H03K19/173;H03K19/21 |
主分类号 |
H03K19/086 |
| 代理机构 |
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