发明名称 MOS TYPE SEMICONDUCTOR MEMORY DEVICE
摘要 PURPOSE:To obtain a memory device having an FAMOS structure, in which diffusion of source and drain regions is omitted and the area of an element can be remarkably reduced, by providing a longitudinal groove in the surface of a semiconductor substrate, and forming the source region, a channel part and the drain region on the side wall of the groove in the direction of the depth of the groove. CONSTITUTION:A one-conductivity type first semiconductor region 1, a reverse- conductivity type second semiconductor region 2 provided thereon and a third semiconductor region 3, whose conductivity type is the same as the first-conductivity type region and which is provided on a part of the surface of the second semiconductor region 2, are all arranged in parallel. A longitudinal groove 10 is provided from the third semiconductor region 3 until the groove reaches the first semiconductor region 1. The surface of the second semiconductor region 2, which is in contact with the side wall surface of the longitudinal groove 10 is made to be a channel part 17. A floating gate 12 is provided through the a first insulating film 13, which is provided along the side wall surface. A control gate 14 is provided through a second insulating film 11 so as to cover the floating gate 12. The floating gate 12 is limited only to the side wall part of the longitudinal groove 10. Thus, the area of an element can be reduced with respect to a FAMOS utilizing the V shaped groove.
申请公布号 JPS6336561(A) 申请公布日期 1988.02.17
申请号 JP19860180357 申请日期 1986.07.30
申请人 NEC CORP 发明人 KOYAMA KUNIAKI
分类号 H01L27/112;H01L21/8246;H01L21/8247;H01L29/788;H01L29/792 主分类号 H01L27/112
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