| 摘要 |
PURPOSE:To improve the arithmetic speed of an arithmetic unit by providing a 2nd all-'0' check circuit which check whether or not all bits of the arithmetic result of a 1st computing element are all '0' and a check circuit which checks whether or not all bits of the arithmetic result of the 1st arithmetic part are all '1'. CONSTITUTION:This arithmetic unit is provided with a check circuit such as the 2nd all-'0' check circuit 500 which checks whether or not the digits of the arithmetic result of the 1st computing element 100 for bit-to-bit arithmetic operation between two input data consisting of plural bits are all '0' or an all-'1' check circuit 600 which checks whether or not the bits of the arithmetic result of the 1st computing element 100 are all '1'. Therefore, it is known on the basis of the check result of the 2nd all-'0' check circuit 500 or check circuit whether or not the arithmetic result is in the all-'0' state at the end of the arithmetic or before it according to the kind of the arithmetic, thereby speeding up the operation of the arithmetic device. |
