| 摘要 |
In an electronic circuit for dividing a dividend (RR) by a divisor (RD) to calculate an eventual quotient (Q) divisible into first through N-th partial quotients, each being represented by a g-ary number, an approximate reciprocal (RC) of the divisor is read out of a memory (34) and multiplied in a first multiplication circuit (36) by the divisor to obtain a correction factor (C1). A second multiplication circuit (37) multiplies the dividend by the approximate reciprocal to calculate a first provisional quotient which is near to the eventual quotient and which is processed into a first partial provisional quotient (P1) and a second provisional quotient by a first adder circuit (61) and a second partial divider (641), respectively. The first partial provisional quotient is modified into the first partial quotient Q1 with reference to the second provisional quotient in a first correction circuit (661). Likewise, an i-th partial quotient (Q1) except the first partial quotient is successively produced from an i-th correction circuit (66i) by modifying an i-th partial provisional quotient (Pi) with reference to an (i+1)-th provisional quotient. Thus, the first through the N-th partial quotients successively appear from the first through the N-th correction circuits and are synchronously produced as the eventual quotient from a synchronization circuit (105).
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