Simulation device

摘要

A simulator for simulating the response of a network of predefined processing elements to a set of input stimuli. The network processing elements are arrayed in a plurality of rows and columns and a representation of each element is stored in a storage location in a symbol memory, the storage locations of which have row and column addresses corresponding to the rows and columns in the network array. A control circuit iteratively receives representations from the symbol memory identifying a processing element at a location in the network and controls an arithmetic and logic unit to generate an output signal representative of the output of the corresponding processing element in response to input stimuli which are represented by data signals from a data memory and an intermediate storage register. The control circuit then controls the storage of the output signal from the arithmetic and logic unit in the data memory and the intermediate storage register. The simulator iteratively processes each processing element by stepping across each row in the network and down from one row to the next until all of the elements are processed.