发明名称 Wafer inspection interface and wafer inspection apparatus
摘要 A wafer inspection interface 18 includes a probe card 20 having multiple probes 25 at a surface of the probe card 20 facing a wafer W, the probes 25 being arranged to correspond to electrodes of multiple semiconductor devices formed on the wafer W; a pogo frame 40 that is in contact with a surface of the probe card 20 opposite to the surface of the probe card 20 facing the wafer W and supports the probe card 20; and a sheath heater 44 provided in the pogo frame 40. The sheath heater 44 is provided along respective sides of through holes 43 formed in the pogo frame 40 in a grid pattern.
申请公布号 US9395405(B2) 申请公布日期 2016.07.19
申请号 US201313787956 申请日期 2013.03.07
申请人 TOKYO ELECTRON LIMITED 发明人 Yamada Hiroshi
分类号 G01R1/44;G01R31/26;G01R31/28 主分类号 G01R1/44
代理机构 Pearne & Gordon LLP 代理人 Pearne & Gordon LLP
主权项 1. A wafer inspection interface comprising: a probe card having a multiple number of probes on a bottom surface of the probe card facing a wafer, the probes being arranged to correspond to electrodes of a plurality of semiconductor devices formed on the wafer; a frame that is in contact with an upper surface of the probe card and supports the probe card; and a heating member provided within the frame and at a position proximate a contact surface between the frame and the upper surface of the probe card, a bottom surface of the frame being in direct contact with the upper surface of the probe card, wherein the frame and the heating member are vertically aligned with an area of the electrodes where the multiple number of probes are brought into contact with the electrodes, the heating member includes a linear heater, the frame has a multiple number of rectangular through holes, and the linear heater is outside of the rectangular through holes and is provided along respective sides of the rectangular through holes.
地址 Tokyo JP