| 摘要 |
PURPOSE:To improve integration degree and to decrease parasitic capacity, by forming contact holes for connecting the semiconductor region of an MISFET and an electrode by self-aligning method by utilizing a protecting film on a gate electrode. CONSTITUTION:A field oxide film 4 and a channel stopper 5 are formed on the surface of a semiconductor substrate 1. Then, by using a multilayer mask 10 comprising a gate electrode 7A, an insulating film 8A, and a protecting film 9A, a specified shape is formed on a gate insulating film 6. Then, with the protecting film 9A and the insulating film 4 as masks, impurities are implanted, and source and drain regions 11 are formed. Thereafter, thermal oxidation treatment is performed, and an insulating film 12 is formed at the side part of the electrode 7A. At this time, the width of the electrode 7A becomes smaller than the width of the protecting film 9A. Therefore, parasitic capacity between the electrode 7A and the regions 11 becomes small. With the protecting film 9A as a mask, the protecting film 6 is removed, and contact holes 13 are formed by self-alignment at this part. |
