发明名称 |
Integrated circuit having a built-in self test design |
摘要 |
An integrated circuit having a built-in self test design, the integrated circuit including a combinatorial logic circuit, a first register coupled to an output of the combinatorial logic circuit and a feedback path via which output signals from the first register are fed back to an input of the combinatorial logic circuit. A multiplexer is provided between the first register and the feedback path, and there is also provided a second register responsive to a signal which is originated to initiate a test function for feeding test signals via the multiplexer and the feedback path to the input of the combinatorial logic circuit.
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申请公布号 |
US4724380(A) |
申请公布日期 |
1988.02.09 |
申请号 |
US19850804567 |
申请日期 |
1985.12.04 |
申请人 |
PLESSEY OVERSEAS LIMITED |
发明人 |
BURROWS, DAVID F.;PARASKEVA, MARK;KNIGHT, WILLIAM L. |
分类号 |
G01R31/28;G01R31/3185;(IPC1-7):G06F11/00 |
主分类号 |
G01R31/28 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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