发明名称 SUPERCONDUCTING TRANSISTOR INTEGRATED CIRCUIT
摘要 PURPOSE:To manufacture superconducting transistor integrated circuit using miniature transistors optimum for superconducting transistor by a method wherein the resistors are formed using the tunnel resistance when carriers are tunnel- flowing in Shottky barriers formed in junctions. CONSTITUTION:An Si bump corresponding to a channel 2 is formed by reactive plasma etching process using CF4 gas and a semiconductor substrate 1 comprising n-type Si(100) single crystal as a photo resist mask. Next ion implanted parts 3 are formed by implanting boron in a position to form a resistor therein for heat treatment. Successively, insulating films 4 comprising SiO2 are formed by chemical vapor growth at normal pressure. Next, Nb is deposited by DC magnetron sputtering process using Ar gas and then Nb thin film is processed by reactive plasma etching process using a photoresist as a mask to be formed into superconducting electrodes. Finally, junctions between the ionimplanted parts 3 and the superconducting electrodes 6 fill the role of resistors 5.
申请公布号 JPS6329594(A) 申请公布日期 1988.02.08
申请号 JP19860171540 申请日期 1986.07.23
申请人 HITACHI LTD 发明人 NISHINO JUICHI;KAWABE USHIO;HATANO MUTSUKO
分类号 H01L39/22 主分类号 H01L39/22
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