| 摘要 |
PURPOSE:To prevent the generation of disconnection and the like of a wiring, to independently control the resistance value of a highly resistant load element, to reduce a leak current and power consumption, to reduce the area of a memory cell, and to contrive improvement in the degree of integration of an SRAM by a method wherein the highly resistant load element of the SRAM is formed with the conductive layer consisting of the layer different from the wiring to be used for source voltage. CONSTITUTION:A wiring for source voltage (Vcc) 11 and a highly resistant load elements (R1 and R2) 13 are provided on the upper part of an insulating film 10 with which MISFET Qs and Qd are covered. Said wiring 11 for source voltage is provided in such a manner that it is extended in the direction of column, the wiring 11 is composed of the conductive layer such as a polycrystalline silicon film, for example, with which the value of resistance can be controlled by the introduction of impurities, and the silicon film is constituted with a thick film. On the other hand, the highly resistant load element 13 is formed by the upper layer of the conductive layer different from the wiring 11, said element 13 is constituted with a non-doped polycrystalline silicon film consisting of a thin film. As a result, a leak current and power consumtion can be reduced by the high resistant load element 13, and on the other hand, the wiring on the stepped part is prevented by the wiring 11 for source voltage. Accordingly, the area of a memory cell can be reduced, and the degree of integration of the SRAM can also be improved. |
