| 摘要 |
PURPOSE:To continuously execute DMA transfer to plural memory blocks as a series of operation by setting up information for data transfer in a 2nd register during the execution of DMA transfer based upon the contents of a 1st register. CONSTITUTION:A microprocessor sets up the information of a memory block to which data are to be transferred in the 1st memory address register 1 and a 1st transfer frequency register 2 and sets up a DMA request permission flag 6 to make the memory block DMA transfer enabling state. At the time of input of a DMA request signal 7, a timing control circuit 5 is driven, DMA transfer is started and a memory address 11 and a control signal 12 are outputted to an external. At the time of starting the DMA transfer, a write permission flag 8 is set up and writing in a 2nd memory address register 3 and a 2nd transfer frequency register 4 is permitted. Consequently, the DMA transfer can be continuously executed during the input of the DMA request signal 7. |
