| 摘要 |
PURPOSE:To detect a transfer error with a simple constitution by performing the addition of a data bus and adding the result to the last of transfer data in making access to an address space for a data exchange by a central control unit. CONSTITUTION:The central control unit maintains the state of the data bus until an access completion signal is outputted. During this time, the output value of the output terminal 12 of a memory circuit 1 holding the preceding addition result and the data bus inputted to an input terminal 21 are summed by an adder 2, and the addition result is appears in the input terminal 13 of a memory circuit 1. According to an access completion signal inputted to a memory control terminal 11, the result is held in the memory circuit 1 and added to the contents of the next data bus. The added results of all the data transferred by repeating an operation are stored in the memory circuit 1. Thereby, the addition result of the transferred data can be obtained with a simple circuit constitution and the transfer data can be checked by using the added result.
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