| 摘要 |
PURPOSE:To develop a DO loop which includes an IF statement net into IPA instructions and to speed up processing by varying the comparison result between the elements of two vector operands according to the value of the bit of a control vector. CONSTITUTION:A computing element 25 operates data stored in fetch registers 23 and 24. When a control vector production instruction is executed, it is decided 29 from the arithmetic result whether a specific condition is true or not and when so, '1' is set to a result register 27, while, an arithmetic result significance signal 14 is set to a control bit register 26. An inhibition logic part 31 sends '1' to a result control bit line 37 when a register 26 indicates '1' or '0' to the bit line 37 when the register 26 indicates '0'. Consequently, the control vector production instruction is controlled by the control vector and the DO loop including the IF statement net is developed into IPA instructions. Thus, the processing is speeded up. |
