| 摘要 |
PURPOSE:To decrease the number of carry holding adders by burying '1' to a bit lower than the least significant digit of a multiple of a multiplicand corresponding to a group of multipliers of the most significant digit that is originally even to '0' is accordance with the digit position of the least significant bit of the second and subsequent negative multiples in order to correct those multiples into the complements of '2' from that of '1'. CONSTITUTION:In general the complement of '1' can be converted into the complement of '2' by adding '1' to the least significant bit. However a multiple generator 4 produces a multiple containing '1' buried into the bit position of a digit lower than the least significant bit to be originally equal to zero for multiples produced by the generator 4 with the digit set at the least significant bit of the negative multiples. Thus the negative multiple expressed as a complement of '1' can be corrected into a complement of '2' in case the multiples of multiplicands B0-B7 produced by multiple generators 5-7 are all negative. The multiples of the multiplicands produced by the generators 4-7 are successively added by carry holding adders 8 and 9 and then set to a register 11. |
